๐Ÿ’ป AI Software

ROCm ์ƒ์„ธ

๊ฐœ์š”

ROCm(Radeon Open Compute)์€ AMD๊ฐ€ 2016๋…„์— ๋„์ž…ํ•œ ์˜คํ”ˆ์†Œ์Šค GPU ์ปดํ“จํŒ… ํ”Œ๋žซํผ์œผ๋กœ, AMD Instinct ๋ฐ์ดํ„ฐ์„ผํ„ฐ GPU์™€ Radeon GPU์—์„œ HPC(High Performance Computing) ๋ฐ AI ์›Œํฌ๋กœ๋“œ๋ฅผ ๊ฐ€์†ํ™”ํ•˜๊ธฐ ์œ„ํ•œ ์†Œํ”„ํŠธ์›จ์–ด ์Šคํƒ์„ ์ œ๊ณตํ•œ๋‹ค. ROCm์€ ์ฃผ๋กœ ์˜คํ”ˆ์†Œ์Šค ๊ตฌ์„ฑ ์š”์†Œ๋กœ ๊ตฌ์„ฑ๋˜๋ฉฐ, NVIDIA CUDA์™€ ์œ ์‚ฌํ•œ ํ”„๋กœ๊ทธ๋ž˜๋ฐ ๋ชจ๋ธ์ธ HIP(Heterogeneous-compute Interface for Portability)๋ฅผ ํ†ตํ•ด ๊ธฐ์กด CUDA ์ฝ”๋“œ์˜ ํฌํŒ…์„ ์ง€์›ํ•œ๋‹ค.

ROCm์˜ ํ•ต์‹ฌ ์„ค๊ณ„ ์ฒ ํ•™์€ ์˜คํ”ˆ์†Œ์Šค ํˆฌ๋ช…์„ฑ๊ณผ ํ•˜๋“œ์›จ์–ด ์ด์‹์„ฑ(portability)์ด๋‹ค. ๊ฐœ๋ฐœ์ž๋Š” ROCm์„ ํ†ตํ•ด AMD GPU์˜ ์„ฑ๋Šฅ์— ์ ‘๊ทผํ•  ์ˆ˜ ์žˆ์œผ๋ฉฐ, MIT ๋ผ์ด์„ ์Šค ๊ธฐ๋ฐ˜์˜ ์˜คํ”ˆ์†Œ์Šค ๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ๋“ค์„ ํ™œ์šฉํ•˜์—ฌ AI ์ถ”๋ก /ํ›ˆ๋ จ, ๊ณผํ•™ ๊ณ„์‚ฐ, ์‹œ๋ฎฌ๋ ˆ์ด์…˜ ๋“ฑ ๋‹ค์–‘ํ•œ ์›Œํฌ๋กœ๋“œ๋ฅผ ๊ฐ€์†ํ™”ํ•  ์ˆ˜ ์žˆ๋‹ค. ROCm์€ ํ˜„์žฌ MI250X(CDNA2), MI300X/MI300A(CDNA3), ๊ทธ๋ฆฌ๊ณ  ์ตœ์‹  MI350(CDNA4) ์•„ํ‚คํ…์ฒ˜๋ฅผ ์ง€์›ํ•˜๋ฉฐ, PyTorch, TensorFlow, JAX ๋“ฑ ์ฃผ์š” ๋จธ์‹ ๋Ÿฌ๋‹ ํ”„๋ ˆ์ž„์›Œํฌ์™€์˜ ํ†ตํ•ฉ์„ ์ง€์†์ ์œผ๋กœ ํ™•๋Œ€ํ•˜๊ณ  ์žˆ๋‹ค.

ํ•ต์‹ฌ ๊ฐœ๋…

ROCm ์†Œํ”„ํŠธ์›จ์–ด ์Šคํƒ ์•„ํ‚คํ…์ฒ˜

ROCm Software Stack Architecture

ROCm์€ ๋‹ค์ธต ๊ณ„์ธต ๊ตฌ์กฐ๋กœ ๊ตฌ์„ฑ๋˜์–ด ์žˆ์œผ๋ฉฐ, ๊ฐ ๊ณ„์ธต์ด ํŠน์ • ์—ญํ• ์„ ์ˆ˜ํ–‰ํ•œ๋‹ค:

๊ณ„์ธต ๊ตฌ์„ฑ ์š”์†Œ ์„ค๋ช…
ํ”„๋ ˆ์ž„์›Œํฌ PyTorch, TensorFlow, JAX ๋จธ์‹ ๋Ÿฌ๋‹ ๋ชจ๋ธ ์ •์˜ ๋ฐ ํ›ˆ๋ จ/์ถ”๋ก 
ompiler hipcc, clang, FLANG HIP/C++ ์ฝ”๋“œ๋ฅผ AMD GPU ๋„ค์ดํ‹ฐ๋ธŒ ์ฝ”๋“œ๋กœ ์ปดํŒŒ์ผ
๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ MIOpen, rocBLAS, RCCL, MIGraphX ๊ณ ์„ฑ๋Šฅ ์—ฐ์‚ฐ ์ปค๋„
๋Ÿฐํƒ€์ž„ HIP Runtime, ROCr (ROCR Runtime) GPU ๋ฆฌ์†Œ์Šค ๊ด€๋ฆฌ ๋ฐ ์ปค๋„ ์‹คํ–‰
๋“œ๋ผ์ด๋ฒ„ KFD (Kernel Fusion Driver) ํ•˜๋“œ์›จ์–ด ์ ‘๊ทผ ๋ฐ ๋ฉ”๋ชจ๋ฆฌ ๊ด€๋ฆฌ
ํ•˜๋“œ์›จ์–ด AMD Instinct MI250X/MI300X/MI350 GPU ํ•˜๋“œ์›จ์–ด

HIP ํ”„๋กœ๊ทธ๋ž˜๋ฐ ๋ชจ๋ธ

HIP Programming Model

HIP(Heterogeneous-compute Interface for Portability)๋Š” ROCm์˜ ํ•ต์‹ฌ ํ”„๋กœ๊ทธ๋ž˜๋ฐ ์ธํ„ฐํŽ˜์ด์Šค๋กœ, CUDA C/C++๊ณผ ์œ ์‚ฌํ•œ ๊ตฌ๋ฌธ์„ ์ œ๊ณตํ•˜์—ฌ ๊ฐœ๋ฐœ์ž๊ฐ€ ์†์‰ฝ๊ฒŒ AMD GPU์—์„œ ๋ณ‘๋ ฌ ์ปค๋„์„ ์ž‘์„ฑํ•  ์ˆ˜ ์žˆ๊ฒŒ ํ•œ๋‹ค.

HIP ์ปค๋„ ์„ ์–ธ:

__global__ void myKernel(float* data, int n) {
    int idx = threadIdx.x + blockIdx.x * blockDim.x;
    if (idx < n) {
        data[idx] = data[idx] * 2.0f;
    }
}

// ์ปค๋„ ํ˜ธ์ถœ
hipLaunchKernelGGL(myKernel, dim3(gridSize), dim3(blockSize), 0, 0, d_data, n);

HIP ๋ฉ”๋ชจ๋ฆฌ ๊ด€๋ฆฌ API:

ํ•จ์ˆ˜ ์„ค๋ช… CUDA ๋Œ€์‘
hipMalloc() GPU ๋ฉ”๋ชจ๋ฆฌ ํ• ๋‹น cudaMalloc()
hipMemcpy() ํ˜ธ์ŠคํŠธ-๋””๋ฐ”์ด์Šค ๊ฐ„ ๋ฐ์ดํ„ฐ ๋ณต์‚ฌ cudaMemcpy()
hipFree() GPU ๋ฉ”๋ชจ๋ฆฌ ํ•ด์ œ cudaFree()
hipMemcpyAsync() ๋น„๋™๊ธฐ ๋ฐ์ดํ„ฐ ๋ณต์‚ฌ cudaMemcpyAsync()
hipMemset() GPU ๋ฉ”๋ชจ๋ฆฌ ์ดˆ๊ธฐํ™” cudaMemset()

HIP ์Šค๋ ˆ๋“œ ๋™๊ธฐํ™”:

ํ•จ์ˆ˜ ์„ค๋ช…
__syncthreads() ๋ธ”๋ก ๋‚ด ์Šค๋ ˆ๋“œ ๋™๊ธฐํ™”
__syncwarp() ์›Œํ”„ ๋‚ด ์Šค๋ ˆ๋“œ ๋™๊ธฐํ™”
hipDeviceSynchronize() ํ˜ธ์ŠคํŠธ์—์„œ ๋””๋ฐ”์ด์Šค ๋™๊ธฐํ™” ๋Œ€๊ธฐ

ROCm ๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ ์ƒํƒœ๊ณ„

ROCm Libraries

ROCm์€ ๋‹ค์–‘ํ•œ ๋„๋ฉ”์ธ์— ํŠนํ™”๋œ ๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ ์„ธํŠธ๋ฅผ ์ œ๊ณตํ•œ๋‹ค:

์ˆ˜ํ•™ ๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ:

๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ ๊ธฐ๋Šฅ NVIDIA ๋Œ€์‘
rocBLAS ๊ธฐ๋ณธ ์„ ํ˜•๋Œ€์ˆ˜ (GEMM, GEMV, TRSM) cuBLAS
hipBLAS rocBLAS/CUBLAS ํ˜ธํ™˜ ์ธํ„ฐํŽ˜์ด์Šค cuBLAS (ํฌํŒ… ํŽธ์˜)
hipBLASLt ๋ฐฐ์น˜ GEMM, ์Šค์ผ€์ค„๋ง ์ตœ์ ํ™” cuBLASLt
rocSOLVER ์„ ํ˜•๋ฐฉ์ •์‹/๊ณ ์œ ๊ฐ’ ๋ถ„์„ cuSOLVER
rocSPARSE ํฌ์†Œ ํ–‰๋ ฌ ์—ฐ์‚ฐ cuSPARSE
rocFFT ํ‘ธ๋ฆฌ์— ๋ณ€ํ™˜ cuFFT
rocRAND ๋‚œ์ˆ˜ ์ƒ์„ฑ cuRAND

๋”ฅ ๋Ÿฌ๋‹ ๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ:

๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ ๊ธฐ๋Šฅ NVIDIA ๋Œ€์‘
MIOpen ๋”ฅ ๋Ÿฌ๋‹ ํ”„๋ฆฌ๋ฏธํ‹ฐ๋ธŒ (Conv, Pool, BN, Activation) cuDNN
MIGraphX ์ถ”๋ก  ๊ทธ๋ž˜ํ”„ ์ตœ์ ํ™” ์—”์ง„ TensorRT
Composable Kernel ์ปค์Šคํ…€ ๊ณ ์„ฑ๋Šฅ ์ปค๋„ ์ž‘์„ฑ CUTLASS

ํ†ต์‹  ๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ:

๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ ๊ธฐ๋Šฅ NVIDIA ๋Œ€์‘
RCCL ๋‹ค์ค‘ GPU/๋…ธ๋“œ ๊ฐ„ All-Reduce ๋“ฑ ์ง‘์•ฝ ํ†ต์‹  NCCL
rocSHMEM ๋ถ„์‚ฐ ๊ณต์œ  ๋ฉ”๋ชจ๋ฆฌ NCCL SHMEM
hipCUB ๋ณ‘๋ ฌ ํ”„๋ฆฌ๋ฏธํ‹ฐ๋ธŒ (Scan, Reduce, Sort) CUB

์ปดํ“จํ„ฐ ๋น„์ „ ๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ:

๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ ๊ธฐ๋Šฅ
MIVisionX ์ปดํ“จํ„ฐ ๋น„์ „ ๋ฐ ML ํ”„๋ฆฌ๋ฏธํ‹ฐ๋ธŒ
RPP ROCm Performance Primitives (์ด๋ฏธ์ง€ ์ฒ˜๋ฆฌ)

ROCm ๊ฐœ๋ฐœ ๋„๊ตฌ

ROCm์€ ๊ฐœ๋ฐœ, ๋””๋ฒ„๊น…, ํ”„๋กœํŒŒ์ผ๋ง์„ ์œ„ํ•œ ๋‹ค์–‘ํ•œ ๋„๊ตฌ๋ฅผ ์ œ๊ณตํ•œ๋‹ค:

์ปดํŒŒ์ผ ๋„๊ตฌ:

๋„๊ตฌ ๊ธฐ๋Šฅ
hipcc HIP/C++ ์ปดํŒŒ์ผ๋Ÿฌ (clang ๊ธฐ๋ฐ˜)
hipify-perl / hipify-cuda CUDA ์ฝ”๋“œ๋ฅผ HIP ์ฝ”๋“œ๋กœ ์ž๋™ ๋ณ€ํ™˜
cmake ๋นŒ๋“œ ์‹œ์Šคํ…œ (CMake ํŒจํ‚ค์ง€ ์ง€์›)

ํ”„๋กœํŒŒ์ผ๋ง ๋„๊ตฌ:

๋„๊ตฌ ๊ธฐ๋Šฅ
rocprofiler-SDK ํ•˜๋“œ์›จ์–ด ์นด์šดํ„ฐ ๋ฐ ํŠธ๋ ˆ์ด์‹ฑ
ROCm Compute Profiler ์ปค๋„ ์‹คํ–‰ ํ”„๋กœํŒŒ์ผ๋ง
rocminfo GPU ํ•˜๋“œ์›จ์–ด ์ •๋ณด ์กฐํšŒ
AMD SMI GPU ์ƒํƒœ ๋ชจ๋‹ˆํ„ฐ๋ง (์˜จ๋„, ์ „๋ ฅ, ํด๋Ÿญ)

๋””๋ฒ„๊น… ๋„๊ตฌ:

๋„๊ตฌ ๊ธฐ๋Šฅ
ROCgdb GPU ๋””๋ฒ„๊ฑฐ (GDB ๊ธฐ๋ฐ˜)
ROCdbgapi GPU ๋””๋ฒ„๊น… API

ROCm ํ•˜๋“œ์›จ์–ด ์ง€์›

ROCm์€ ์—ฌ๋Ÿฌ ์„ธ๋Œ€์˜ AMD GPU ์•„ํ‚คํ…์ฒ˜๋ฅผ ์ง€์›ํ•œ๋‹ค:

์•„ํ‚คํ…์ฒ˜ GPU ๋ชจ๋ธ ์ถœ์‹œ ํŠน์ง•
CDNA MI60, MI50 2019 ์ตœ์ดˆ CDNA, 7nm
CDNA2 MI250X, MI250 2021 6nm, HBM2e, IF 8๋งํฌ
CDNA3 MI300X, MI300A 2023 5nm/6nm, HBM3, APU ์˜ต์…˜
CDNA4 MI350 2025 3nm, HBM3e, 288GB
RDNA3 RX 7900 XTX 2022 ๊ฒŒ์ด๋ฐ/์ฝ˜ํ…์ธ  ํฌ๋ฆฌ์—์ด์…˜
RDNA4 RX 9070 XT 2025 ray tracing ๊ฐ•ํ™”

์ง€์› ์šด์˜์ฒด์ œ:
- Linux: Ubuntu, RHEL, SLES, Oracle Linux, Debian, Rocky Linux
- Windows: HIP SDK (์ œํ•œ์  ์ง€์›)
- Docker: ๊ณต์‹ ROCm ์ปจํ…Œ์ด๋„ˆ ์ด๋ฏธ์ง€ ์ œ๊ณต

๋น„๊ต/๋ถ„์„

ROCm vs CUDA ๋น„๊ต

ํ•ญ๋ชฉ ROCm CUDA
๋ผ์ด์„ ์Šค ์˜คํ”ˆ์†Œ์Šค (MIT) ๋น„๊ณต๊ฐœ (๋ถ€๋ถ„ ๊ณต๊ฐœ)
ํ•˜๋“œ์›จ์–ด AMD GPU (Instinct, Radeon) NVIDIA GPU ์ „์šฉ
ํ”„๋กœ๊ทธ๋ž˜๋ฐ ๋ชจ๋ธ HIP (CUDA ์œ ์‚ฌ) CUDA C/C++
์ปดํŒŒ์ผ๋Ÿฌ hipcc (clang ๊ธฐ๋ฐ˜) nvcc
์ฃผ์š” ๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ MIOpen, rocBLAS, RCCL cuDNN, cuBLAS, NCCL
์ถ”๋ก  ์—”์ง„ MIGraphX TensorRT
ํ”„๋กœํŒŒ์ผ๋ง rocprofiler-SDK, AMD SMI Nsight, nvprof
๋””๋ฒ„๊น… ROCgdb cuda-gdb, compute-sanitizer
็”Ÿๆ…‹๊ณ„ ์„ฑ์ˆ™๋„ 8๋…„+ (์„ฑ์žฅ ์ค‘) 17๋…„+ (๊ฐ€์žฅ ์„ฑ์ˆ™)
์ปค๋ฎค๋‹ˆํ‹ฐ ํฌ๊ธฐ ์ค‘๊ฐ„ (๋น ๋ฅด๊ฒŒ ์„ฑ์žฅ) ๊ฐ€์žฅ ํผ
๋น„์šฉ ๋ฌด๋ฃŒ ๋ฌด๋ฃŒ (ํ•˜๋“œ์›จ์–ด vendor lock-in)

ROCm ๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ ์„ฑ๋Šฅ ๋น„๊ต

๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ ROCm (MIOpen/rocBLAS) NVIDIA (cuDNN/cuBLAS) ๋น„๊ณ 
GEMM (FP32) ์šฐ์ˆ˜ (MI300X ์ตœ์ ํ™”) ์šฐ์ˆ˜ ํ•˜๋“œ์›จ์–ด ์˜์กด
GEMM (FP16/BF16) ์šฐ์ˆ˜ ์šฐ์ˆ˜ MI300X Matrix Core ํ™œ์šฉ
Conv2D good (Winograd ์ง€์›) ์šฐ์ˆ˜ (๋” ๋งŽ์€ ์•Œ๊ณ ๋ฆฌ์ฆ˜) cuDNN์ด ๋” ๋‹ค์–‘ํ•œ conv ์œ ํ˜• ์ง€์›
Attention good (Flash Attention ์ง€์›) ์šฐ์ˆ˜ Flash Attention 2/3 CUDA ๋„ค์ดํ‹ฐ๋ธŒ
์ถ”๋ก  ๊ทธ๋ž˜ํ”„ MIGraphX TensorRT TensorRT๊ฐ€ ํ”„๋กœ๋•์…˜์—์„œ ๋” ์„ฑ์ˆ™

ROCm vs CUDA ํฌํŒ… ์˜ˆ์‹œ

CUDA ์ฝ”๋“œ:

__global__ void vectorAdd(float* a, float* b, float* c, int n) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    if (i < n) c[i] = a[i] + b[i];
}

int main() {
    float *d_a, *d_b, *d_c;
    cudaMalloc(&d_a, n * sizeof(float));
    cudaMalloc(&d_b, n * sizeof(float));
    cudaMalloc(&d_c, n * sizeof(float));
    vectorAdd<<<grid, block>>>(d_a, d_b, d_c, n);
    cudaDeviceSynchronize();
}

HIP ์ฝ”๋“œ (๋ณ€ํ™˜ ํ›„):

__global__ void vectorAdd(float* a, float* b, float* c, int n) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    if (i < n) c[i] = a[i] + b[i];
}

int main() {
    float *d_a, *d_b, *d_c;
    hipMalloc(&d_a, n * sizeof(float));
    hipMalloc(&d_b, n * sizeof(float));
    hipMalloc(&d_c, n * sizeof(float));
    hipLaunchKernelGGL(vectorAdd, dim3(grid), dim3(block), 0, 0, d_a, d_b, d_c, n);
    hipDeviceSynchronize();
}

hipify ์ž๋™ ๋ณ€ํ™˜:

hipify-perl vectorAdd.cu -o vectorAdd.cpp
# ๋˜๋Š”
hipify-cuda vectorAdd.cu --output-dir=hipified/

๋™์ž‘ ์›๋ฆฌ

ROCm ์Šคํƒ ๋™์ž‘ ํ๋ฆ„

  1. ์†Œ์Šค ์ฝ”๋“œ ์ปดํŒŒ์ผ:
    - hipcc๊ฐ€ HIP/C++ ์ฝ”๋“œ๋ฅผ LLVM(clang) ๊ธฐ๋ฐ˜์œผ๋กœ ์ปดํŒŒ์ผ
    - AMDGPU ๋ฐฑ์—”๋“œ๋ฅผ ํ†ตํ•ด AMD GPU ๋„ค์ดํ‹ฐ๋ธŒ ISA๋กœ ๋ณ€ํ™˜
    - HSA(Heterogeneous System Architecture) ํ˜ธํ™˜ ์˜ค๋ธŒ์ ํŠธ ์ฝ”๋“œ ์ƒ์„ฑ

  2. ๋Ÿฐํƒ€์ž„ ๋กœ๋“œ:
    - HIP ๋Ÿฐํƒ€์ž„์ด ์ปดํŒŒ์ผ๋œ ์ปค๋„์„ GPU ๋””๋ฐ”์ด์Šค์— ๋กœ๋“œ
    - ROCr(ROCR Runtime)๊ฐ€ HSA ์ปค๋„ ๋””์ŠคํŒจ์น˜ ์ธํ„ฐํŽ˜์ด์Šค ์ œ๊ณต
    - KFD(Kernel Fusion Driver)๊ฐ€ ํ•˜๋“œ์›จ์–ด ๋ฆฌ์†Œ์Šค ๊ด€๋ฆฌ

  3. ์ปค๋„ ์‹คํ–‰:
    - GPU ์Šค์ผ€์ค„๋Ÿฌ๊ฐ€ ์ปค๋„์„ Compute Unit์— ๋ฐฐ์น˜
    - Wavefront(64 ์Šค๋ ˆ๋“œ) ๋‹จ์œ„๋กœ SIMD ์‹คํ–‰
    - Matrix Core๋ฅผ ํ†ตํ•œ ํ–‰๋ ฌ ์—ฐ์‚ฐ ๊ฐ€์†

  4. ๋ฉ”๋ชจ๋ฆฌ ๊ด€๋ฆฌ:
    - ๊ฐ€์ƒ ์ฃผ์†Œ ๊ณต๊ฐ„ ๊ธฐ๋ฐ˜ ๋ฉ”๋ชจ๋ฆฌ ๊ด€๋ฆฌ
    - HMM(Heterogeneous Memory Management)์„ ํ†ตํ•œ ํ†ต์ผ๋œ ๋ฉ”๋ชจ๋ฆฌ ์ ‘๊ทผ
    - ํŽ˜์ด์ง€ ํด๋ง์„ ํ†ตํ•œ ๋ฉ”๋ชจ๋ฆฌ ์ž๋™ ๋งˆ์ด๊ทธ๋ ˆ์ด์…˜

HIP ์ปค๋„ ์‹คํ–‰ ์ƒ์„ธ

AMD GPU์˜ CDNA ์•„ํ‚คํ…์ฒ˜์—์„œ HIP ์ปค๋„์€ ๋‹ค์Œ๊ณผ ๊ฐ™์ด ์‹คํ–‰๋œ๋‹ค:

Compute Unit (CU) ๋™์ž‘:
- ๊ฐ CU๋Š” 64๊ฐœ์˜ Stream Processor(SIMD32 x 2)๋ฅผ ๊ฐ€์ง
- Wavefront ์Šค์ผ€์ค„๋Ÿฌ๊ฐ€ ์—ฌ๋Ÿฌ Wavefront๋ฅผ ๋™์‹œ์— ์Šค์ผ€์ค„๋ง
- ๋ฉ”๋ชจ๋ฆฌ ์ง€์—ฐ ์‹œ๊ฐ„ ์ˆจ๊น€(latency hiding)์„ ์œ„ํ•œ ๋‹ค์ค‘ Wavefront ํ™œ์„ฑํ™”

๋ฉ”๋ชจ๋ฆฌ ์ ‘๊ทผ ๊ฒฝ๋กœ:
1. ๋ ˆ์ง€์Šคํ„ฐ โ†’ Matrix Core/VALU โ†’ ๊ณต์œ  ๋ฉ”๋ชจ๋ฆฌ(LDS)
2. ๊ณต์œ  ๋ฉ”๋ชจ๋ฆฌ โ†’ L2 ์บ์‹œ โ†’ HBM
3. Infinity Fabric์„ ํ†ตํ•œ ์›๊ฒฉ GPU ๋ฉ”๋ชจ๋ฆฌ ์ ‘๊ทผ
4. HMM์„ ํ†ตํ•œ CPU-GPU ํ†ต์ผ ๋ฉ”๋ชจ๋ฆฌ ๊ณต๊ฐ„ ์ ‘๊ทผ

ROCm ์ปจํ…Œ์ด๋„ˆ ๋ฐ ๋ฐฐํฌ

ROCm์€ Docker ๊ธฐ๋ฐ˜ ๋ฐฐํฌ๋ฅผ ๊ถŒ์žฅํ•˜๋ฉฐ, ๊ณต์‹ ์ปจํ…Œ์ด๋„ˆ ์ด๋ฏธ์ง€๋ฅผ ์ œ๊ณตํ•œ๋‹ค:

# ๊ณต์‹ ROCm ์ปจํ…Œ์ด๋„ˆ ์ด๋ฏธ์ง€
docker pull rocm/rocm-terminal:latest
docker pull rocm/pytorch:latest
docker pull rocm/tensorflow:latest

# MI300X์—์„œ PyTorch ์‹คํ–‰
docker run -it --device=/dev/kfd --device=/dev/dri \
  --group-add video --cap-add SYS_PTRACE \
  rocm/pytorch:latest

์žฅ๋‹จ์ 

์žฅ์ 

  • ์˜คํ”ˆ์†Œ์Šค ํˆฌ๋ช…์„ฑ: MIT ๋ผ์ด์„ ์Šค ๊ธฐ๋ฐ˜ ์™„์ „ํ•œ ์˜คํ”ˆ์†Œ์Šค๋กœ, ์†Œ์Šค ์ฝ”๋“œ ๊ฒ€์ฆ๊ณผ ์ปค์Šคํ„ฐ๋งˆ์ด์ง•์ด ๊ฐ€๋Šฅ
  • CUDA ํ˜ธํ™˜์„ฑ: HIP๋ฅผ ํ†ตํ•œ ๋†’์€ ์ˆ˜์ค€์˜ CUDA ํ˜ธํ™˜์„ฑ์œผ๋กœ ๊ธฐ์กด ์ฝ”๋“œ ํฌํŒ… ์šฉ์ด
  • ๋ฉ”๋ชจ๋ฆฌ ์šฉ๋Ÿ‰/๋Œ€์—ญํญ: MI300X 192GB HBM3(5.3 TB/s) ๋“ฑ AMD GPU์˜ ๋†’์€ ๋ฉ”๋ชจ๋ฆฌ ๋ฆฌ์†Œ์Šค ํ™œ์šฉ
  • ๋น„์šฉ ํšจ์œจ์„ฑ: ๋ผ์ด์„ ์Šค ๋น„์šฉ ์—†์Œ, AMD GPU์˜ ๊ฐ€์„ฑ๋น„ ์šฐ์œ„
  • ์ง€์†์ ์ธ ๋ฐœ์ „: ROCm 7.x๊นŒ์ง€ ๊พธ์ค€ํ•œ ์—…๋ฐ์ดํŠธ, MI350(CDNA4) ์ง€์› ์ค€๋น„
  • ํ”„๋ ˆ์ž„์›Œํฌ ํ†ตํ•ฉ: PyTorch, TensorFlow, JAX ๋“ฑ ์ฃผ์š” ํ”„๋ ˆ์ž„์›Œํฌ ๊ณต์‹ ์ง€์›

๋‹จ์ 

  • ์ƒํƒœ๊ณ„ ์„ฑ์ˆ™๋„: CUDA ๋Œ€๋น„ 10๋…„ ์ด์ƒ์˜ ๊ฒฉ์ฐจ, ์ผ๋ถ€ ๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ์—์„œ ์„ฑ๋Šฅ ๊ฒฉ์ฐจ
  • ๋„๊ตฌ ์ง€์›: Nsight, TensorRT ๋“ฑ NVIDIA ๊ณ ๊ธ‰ ๋„๊ตฌ ๋Œ€๋น„ ์ œํ•œ์ 
  • ์ปค๋ฎค๋‹ˆํ‹ฐ ๊ทœ๋ชจ: NVIDIA ๋Œ€๋น„ ์ƒ๋Œ€์ ์œผ๋กœ ์ž‘์€ ๊ฐœ๋ฐœ์ž ์ปค๋ฎค๋‹ˆํ‹ฐ
  • ๋“œ๋ผ์ด๋ฒ„ ์•ˆ์ •์„ฑ: ์ผ๋ถ€ ํ™˜๊ฒฝ์—์„œ ๋“œ๋ผ์ด๋ฒ„ ์ด์Šˆ ๋ณด๊ณ 
  • ํ•˜๋“œ์›จ์–ด ์ง€์› ๋ฒ”์œ„: NVIDIA GPU ๋Œ€๋น„ ์ƒ๋Œ€์ ์œผ๋กœ ์ œํ•œ๋œ GPU ๋ผ์ธ์—…
  • ํ”„๋กœ๋•์…˜ ๊ฒ€์ฆ: ๋Œ€๊ทœ๋ชจ ํ”„๋กœ๋•์…˜ ๋ฐฐํฌ ์‚ฌ๋ก€๊ฐ€ ์•„์ง ์ถ•์  ์ค‘

๊ด€๋ จ ๊ธฐ์ˆ 

์ฐธ๊ณ  ํ‘œ์ค€ ๋ฐ ์ž๋ฃŒ

  • AMD ROCm Documentation (https://rocm.docs.amd.com)
  • AMD HIP Programming Guide
  • HSA (Heterogeneous System Architecture) Specification
  • AMD Instinct MI300X Datasheet
  • AMD CDNA Architecture Whitepaper
  • LLVM AMDGPU Backend Documentation

๊ด€๋ จ ๋ฌธ์„œ

ํ•ต์‹ฌ ์ •๋ฆฌ

  1. ROCm์€ AMD์˜ ์˜คํ”ˆ์†Œ์Šค GPU ์ปดํ“จํŒ… ํ”Œ๋žซํผ์œผ๋กœ, HIP ํ”„๋กœ๊ทธ๋ž˜๋ฐ ๋ชจ๋ธ์„ ํ†ตํ•ด CUDA ์ฝ”๋“œ์˜ ๋†’์€ ํ˜ธํ™˜์„ฑ์„ ์ œ๊ณตํ•˜๋ฉด์„œ๋„ AMD GPU์˜ ํ•˜๋“œ์›จ์–ด ์ด์ ์„ ํ™œ์šฉํ•  ์ˆ˜ ์žˆ๋‹ค.

  2. ROCm ์Šคํƒ์€ ํ”„๋ ˆ์ž„์›Œํฌ-์ปดํŒŒ์ผ๋Ÿฌ-๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ-๋Ÿฐํƒ€์ž„-๋“œ๋ผ์ด๋ฒ„์˜ ๋‹ค์ธต ๊ตฌ์กฐ๋กœ ๊ตฌ์„ฑ๋˜๋ฉฐ, MIOpen, rocBLAS, RCCL ๋“ฑ ๋‹ค์–‘ํ•œ ๊ณ ์„ฑ๋Šฅ ๋ผ์ด๋ธŒ๋Ÿฌ๋ฆฌ๋ฅผ ํ†ตํ•ด AI/HPC ์›Œํฌ๋กœ๋“œ๋ฅผ ๊ฐ€์†ํ™”ํ•œ๋‹ค.

  3. HIP๋Š” CUDA C/C++๊ณผ ์œ ์‚ฌํ•œ ๊ตฌ๋ฌธ์„ ์ œ๊ณตํ•˜์—ฌ ๊ฐœ๋ฐœ์ž๊ฐ€ ์†์‰ฝ๊ฒŒ ๊ธฐ์กด CUDA ์ฝ”๋“œ๋ฅผ AMD GPU๋กœ ํฌํŒ…ํ•  ์ˆ˜ ์žˆ๊ฒŒ ํ•˜๋ฉฐ, hipify ๋„๊ตฌ๋ฅผ ํ†ตํ•œ ์ž๋™ ๋ณ€ํ™˜๋„ ์ง€์›ํ•œ๋‹ค.

  4. ROCm์€ MI250X(CDNA2), MI300X(CDNA3), MI350(CDNA4) ๋“ฑ ์—ฌ๋Ÿฌ ์„ธ๋Œ€์˜ AMD Instinct GPU๋ฅผ ์ง€์›ํ•˜๋ฉฐ, PyTorch, TensorFlow, JAX ๋“ฑ ์ฃผ์š” ๋จธ์‹ ๋Ÿฌ๋‹ ํ”„๋ ˆ์ž„์›Œํฌ์™€์˜ ํ†ตํ•ฉ์„ ์ง€์†์ ์œผ๋กœ ํ™•๋Œ€ํ•˜๊ณ  ์žˆ๋‹ค.

  5. ROCm์˜ ์ฃผ์š” ๊ฐ•์ ์€ ์˜คํ”ˆ์†Œ์Šค ํˆฌ๋ช…์„ฑ, CUDA ํ˜ธํ™˜์„ฑ, AMD GPU์˜ ๋†’์€ ๋ฉ”๋ชจ๋ฆฌ ์šฉ๋Ÿ‰/๋Œ€์—ญํญ ํ™œ์šฉ์ด๋ฉฐ, ์ƒํƒœ๊ณ„ ์„ฑ์ˆ™๋„์™€ ๋„๊ตฌ ์ง€์›์€ ์ง€์†์ ์œผ๋กœ ๊ฐœ์„ ๋˜๊ณ  ์žˆ๋Š” ๊ณผ์ œ์ด๋‹ค.