๐Ÿ”ฌ NVM

ReRAM Analysis

ReRAM (์ €ํ•ญ ๋ณ€ํ™” ๋ฉ”๋ชจ๋ฆฌ) ์ƒ์„ธ ๋ถ„์„

Resistive RAM ยท MIM Cell ยท Filament ยท Set/Reset ยท Cross-point ยท In-Memory Computing

0. ๊ฐœ์š”

ReRAM(Resistive RAM, ์ €ํ•ญ ๋ณ€ํ™” ๋ฉ”๋ชจ๋ฆฌ)์€ ์…€์˜ โ€˜์ €ํ•ญ ๊ฐ’โ€™์œผ๋กœ ๋ฐ์ดํ„ฐ๋ฅผ ์ €์žฅํ•˜๋Š” ๋น„ํœ˜๋ฐœ์„ฑ ๋ฉ”๋ชจ๋ฆฌ์ž…๋‹ˆ๋‹ค. SRAM์˜ ๋ž˜์น˜, DRAM์˜ ์ปคํŒจ์‹œํ„ฐ ์ „ํ•˜, NAND์˜ ๊ฒŒ์ดํŠธ ์ „ํ•˜์ฒ˜๋Ÿผ โ€˜์ „ํ•˜โ€™๋กœ ์ €์žฅํ•˜๋Š” ๊ธฐ์กด ๋ฉ”๋ชจ๋ฆฌ์™€ ๋‹ฌ๋ฆฌ, ReRAM์€ โ€˜์ €ํ•ญ ์ƒํƒœโ€™ ์ž์ฒด๋ฅผ ์ •๋ณด๋กœ ์”๋‹ˆ๋‹ค. ๋ณธ ๋ฌธ์„œ๋Š” ReRAM์˜ ์…€ ๊ตฌ์กฐ์™€ ์ €ํ•ญ ์Šค์œ„์นญ ์›๋ฆฌ, Forming/Set/Reset ๋™์ž‘, cross-point ์–ด๋ ˆ์ด์™€ sneak path ๋ฌธ์ œ, ๊ทธ๋ฆฌ๊ณ  ๋‹ค๋ฅธ ๋ฉ”๋ชจ๋ฆฌ์™€์˜ ๋น„๊ต ๋ฐ ํ™œ์šฉ ์ „๋ง์„ ๋ถ„์„ํ•ฉ๋‹ˆ๋‹ค.

ReRAM์€ ๋‘ ๊ธˆ์† ์ „๊ทน ์‚ฌ์ด์˜ ์–‡์€ ์ ˆ์—ฐ๋ง‰์—์„œ ์‚ฐ์†Œ ๊ณต๊ณต์ด๋‚˜ ๊ธˆ์† ์ด์˜จ์ด ์ด๋™ํ•˜๋ฉด์„œ ์ „๋„ ๊ฒฝ๋กœ๋ฅผ ๋งŒ๋“ค๊ณ  ๋Š๋Š” ๋ฐฉ์‹์œผ๋กœ ๋™์ž‘ํ•ฉ๋‹ˆ๋‹ค. ์ด ๋•Œ๋ฌธ์— 2๋‹จ์ž MIM ๊ตฌ์กฐ๊ฐ€ ๋‹จ์ˆœํ•˜๊ณ , BEOL ์ ์ธต๊ณผ ๊ณ ๋ฐ€๋„ cross-point ๊ตฌํ˜„์— ์œ ๋ฆฌํ•ฉ๋‹ˆ๋‹ค. ๋‹ค๋งŒ forming ํŽธ์ฐจ, ์†Œ์ž ๊ฐ„ ์‚ฐํฌ, sneak path ์–ต์ œ๋Š” ์‹ค์ œ ์–ด๋ ˆ์ด ์„ค๊ณ„์—์„œ ๋ฐ˜๋“œ์‹œ ๋‹ค๋ค„์•ผ ํ•  ๋ฌธ์ œ์ž…๋‹ˆ๋‹ค.

์ตœ๊ทผ ๊ณต๊ฐœ ๋ฆฌ๋ทฐ์—์„œ๋„ ReRAM์€ ๊ธˆ์†-์ ˆ์—ฐ์ฒด-๊ธˆ์†(MIM) ์‹œ์Šคํ…œ์—์„œ์˜ ์ €ํ•ญ ์Šค์œ„์นญ์œผ๋กœ ์ •๋ฆฌ๋˜๋ฉฐ, HfO2 ๊ฐ™์€ ์‚ฐํ™”๋ฌผ ๊ณ„์—ด์ด ์ €์ „์•• ReRAM ํ›„๋ณด๋กœ ๋งŽ์ด ์—ฐ๊ตฌ๋ฉ๋‹ˆ๋‹ค. ๋˜ํ•œ ์‚ฐํ™”๋ฌผ์˜ anion-migration ๊ธฐ๋ฐ˜ switching์€ ์ „ํ•˜ ์ €์žฅํ˜• ๋ฉ”๋ชจ๋ฆฌ์™€ ๋‹ค๋ฅธ ๋…๋ฆฝ์ ์ธ ๋ฌผ๋ฆฌ ๋ฉ”์ปค๋‹ˆ์ฆ˜์œผ๋กœ ์ทจ๊ธ‰๋ฉ๋‹ˆ๋‹ค.

1. ํ•ต์‹ฌ ๊ฐœ๋…

๊ฐœ๋… ์˜๋ฏธ ์™œ ์ค‘์š”ํ•œ๊ฐ€
MIM ์…€ Metal-Insulator-Metal 2๋‹จ์ž ๊ตฌ์กฐ ๋‹จ์ˆœํ•œ ์ ์ธต์œผ๋กœ ๊ณ ๋ฐ€๋„ํ™”๊ฐ€ ์‰ฝ์Šต๋‹ˆ๋‹ค
ํ•„๋ผ๋ฉ˜ํŠธ ์‚ฐ์†Œ ๊ณต๊ณต ๋˜๋Š” ๊ธˆ์† ์ด์˜จ์ด ๋งŒ๋“  ์ „๋„ ๊ฒฝ๋กœ LRS/HRS ์ „ํ™˜์˜ ์‹ค์ œ ๋ฌผ๋ฆฌ ๊ฒฝ๋กœ์ž…๋‹ˆ๋‹ค
Forming ์ตœ์ดˆ 1ํšŒ ๊ณ ์ „์••์œผ๋กœ ๊ฒฝ๋กœ๋ฅผ ์—ฌ๋Š” ๊ณผ์ • ์ดˆ๊ธฐ ํŠน์„ฑ ํŽธ์ฐจ์™€ ์‹ ๋ขฐ์„ฑ์˜ ์ถœ๋ฐœ์ ์ž…๋‹ˆ๋‹ค
Set/Reset ํ•„๋ผ๋ฉ˜ํŠธ๋ฅผ ์—ฐ๊ฒฐํ•˜๊ฑฐ๋‚˜ ๋Š๋Š” ์“ฐ๊ธฐ ๋™์ž‘ ๋ฐ์ดํ„ฐ 0/1์„ ์ „๊ธฐ์ ์œผ๋กœ ๊ธฐ๋กํ•ฉ๋‹ˆ๋‹ค
Selector sneak path๋ฅผ ๋ง‰๋Š” ๋น„์„ ํ˜• ์†Œ์ž cross-point ์–ด๋ ˆ์ด์˜ ์ฝ๊ธฐ ์˜ค๋ฅ˜๋ฅผ ์ค„์ž…๋‹ˆ๋‹ค

ReRAM์€ ํ•„๋ผ๋ฉ˜ํŠธ๊ฐ€ ์—ฐ๊ฒฐ๋˜๋ฉด LRS, ๋Š์–ด์ง€๋ฉด HRS๊ฐ€ ๋˜๋ฉฐ, ์ฝ๊ธฐ๋Š” ์ž‘์€ ์ „์••์œผ๋กœ ์ €ํ•ญ๋งŒ ์ธก์ •ํ•˜๋Š” ๋น„ํŒŒ๊ดด ๋ฐฉ์‹์ž…๋‹ˆ๋‹ค. ์†Œ์ž ๊ตฌ์กฐ์— ๋”ฐ๋ผ bipolar์™€ unipolar ๋™์ž‘์ด ๋‚˜๋‰˜๊ณ , ์†Œ์žฌ์— ๋”ฐ๋ผ ์‚ฐ์†Œ ๊ณต๊ณตํ˜•๊ณผ ๊ธˆ์† ํ•„๋ผ๋ฉ˜ํŠธํ˜•์ด ํ•จ๊ป˜ ์—ฐ๊ตฌ๋ฉ๋‹ˆ๋‹ค.

ReRAM(Resistive RAM, ์ €ํ•ญ ๋ณ€ํ™” ๋ฉ”๋ชจ๋ฆฌ)์€ ์…€์˜ โ€˜์ €ํ•ญ ๊ฐ’โ€™์œผ๋กœ ๋ฐ์ดํ„ฐ๋ฅผ ์ €์žฅํ•˜๋Š” ๋น„ํœ˜๋ฐœ์„ฑ ๋ฉ”๋ชจ๋ฆฌ์ž…๋‹ˆ๋‹ค. SRAM์˜ ๋ž˜์น˜, DRAM์˜ ์ปคํŒจ์‹œํ„ฐ ์ „ํ•˜, NAND์˜ ๊ฒŒ์ดํŠธ ์ „ํ•˜์ฒ˜๋Ÿผ โ€˜์ „ํ•˜โ€™๋กœ ์ €์žฅํ•˜๋Š” ๊ธฐ์กด ๋ฉ”๋ชจ๋ฆฌ์™€ ๋‹ฌ๋ฆฌ, ReRAM์€ โ€˜์ €ํ•ญ ์ƒํƒœโ€™ ์ž์ฒด๋ฅผ ์ •๋ณด๋กœ ์”๋‹ˆ๋‹ค. ๋ณธ ๋ฌธ์„œ๋Š” ReRAM์˜ ์…€ ๊ตฌ์กฐ์™€ ์ €ํ•ญ ์Šค์œ„์นญ ์›๋ฆฌ, Forming/Set/Reset ๋™์ž‘, cross-point ์–ด๋ ˆ์ด์™€ sneak path ๋ฌธ์ œ, ๊ทธ๋ฆฌ๊ณ  ๋‹ค๋ฅธ ๋ฉ”๋ชจ๋ฆฌ์™€์˜ ๋น„๊ต ๋ฐ ํ™œ์šฉ ์ „๋ง์„ ๋ถ„์„ํ•ฉ๋‹ˆ๋‹ค.

์ถ”๊ฐ€๋กœ ์–ด๋ ˆ์ด ๊ด€์ ์—์„œ๋Š” memory element๋งŒ์œผ๋กœ๋Š” ๋Œ€ํ˜• cross-point๋ฅผ ์•ˆ์ •์ ์œผ๋กœ ์ฝ๊ธฐ ์–ด๋ ต๊ธฐ ๋•Œ๋ฌธ์— selector์™€ ํ•จ๊ป˜ ๋ณด๋Š” ๊ฒƒ์ด ์ค‘์š”ํ•ฉ๋‹ˆ๋‹ค. ์†Œ์žฌ ๊ด€์ ์—์„œ๋Š” TaOx, HfO2, TiOx, SiOx ๊ฐ™์€ ์‚ฐํ™”๋ฌผ ๊ณ„์—ด๊ณผ ๊ธˆ์† ๋ธŒ๋ฆฌ์ง€ํ˜• CBRAM ๊ณ„์—ด์„ ๊ตฌ๋ถ„ํ•ด ์ดํ•ดํ•ด์•ผ ํ•˜๋ฉฐ, ์‹ค์ œ ์ œํ’ˆํ™” ๋‹จ๊ณ„์—์„œ๋Š” switching window, forming ์ „์••, retention, endurance๋ฅผ ๋™์‹œ์— ๋งž์ถ”๋Š” ๊ณต์ • ์ตœ์ ํ™”๊ฐ€ ํ•ต์‹ฌ์ž…๋‹ˆ๋‹ค.

2. ReRAM ์…€ ๊ตฌ์กฐ์™€ ์ €ํ•ญ ์Šค์œ„์นญ

ReRAM ์…€์€ ๋‘ ๊ธˆ์† ์ „๊ทน ์‚ฌ์ด์— ์–‡์€ ๊ธˆ์† ์‚ฐํ™”๋ฌผ(์ ˆ์—ฐ์ฒด)์„ ๋ผ์šด MIM(Metal-Insulator-Metal) ๊ตฌ์กฐ์ž…๋‹ˆ๋‹ค. ํ‰์†Œ์—๋Š” ์ ˆ์—ฐ์ฒด๋ผ ์ „๋ฅ˜๊ฐ€ ํ๋ฅด์ง€ ์•Š์ง€๋งŒ, ์ „์••์„ ๊ฑธ๋ฉด ์‚ฐํ™”๋ฌผ ์•ˆ์— ์ „๋ฅ˜๊ฐ€ ํ๋ฅด๋Š” โ€˜์ „๋„์„ฑ ํ•„๋ผ๋ฉ˜ํŠธ(conductive filament)โ€™๊ฐ€ ์ƒ๊ธฐ๊ฑฐ๋‚˜ ๋Š์–ด์ง‘๋‹ˆ๋‹ค. ์ด ํ•„๋ผ๋ฉ˜ํŠธ๋Š” ์ฃผ๋กœ ์‚ฐ์†Œ ๊ณต๊ณต(oxygen vacancy)์ด๋‚˜ ๊ธˆ์† ์›์ž๊ฐ€ ์‚ฌ์Šฌ์ฒ˜๋Ÿผ ์ด์–ด์ง„ ํ†ต๋กœ์ž…๋‹ˆ๋‹ค.

ReRAM Analysis

๊ทธ๋ฆผ 1. ReRAM์˜ MIM ์…€ ๊ตฌ์กฐ์™€ LRS/HRS ์ €ํ•ญ ์ƒํƒœ

๋‘ ๊ฐ€์ง€ ์ €ํ•ญ ์ƒํƒœ

๋‘ ์ €ํ•ญ ์ƒํƒœ๋Š” ์ „์›์ด ์—†์–ด๋„ ์œ ์ง€๋ฉ๋‹ˆ๋‹ค. ์‚ฐํ™”๋ฌผ ๋‚ด๋ถ€์˜ ์›์ž ๋ฐฐ์—ด(ํ•„๋ผ๋ฉ˜ํŠธ ์œ ๋ฌด)์ด ๊ทธ๋Œ€๋กœ ๋‚จ๊ธฐ ๋•Œ๋ฌธ์— ๋น„ํœ˜๋ฐœ์„ฑ์ž…๋‹ˆ๋‹ค. ์…€ ๊ตฌ์กฐ๊ฐ€ ๋งค์šฐ ๋‹จ์ˆœํ•œ 2๋‹จ์ž ์†Œ์ž๋ผ, ๋ฏธ์„ธํ™”ยท3D ์ ์ธตยทcross-point ์–ด๋ ˆ์ด์— ์œ ๋ฆฌํ•œ ๊ฒƒ์ด ํฐ ์žฅ์ ์ž…๋‹ˆ๋‹ค.

3. ๋™์ž‘ โ€” Forming / Set / Reset / Read

ReRAM์˜ ์“ฐ๊ธฐ๋Š” ํ•„๋ผ๋ฉ˜ํŠธ๋ฅผ ์—ฐ๊ฒฐํ•˜๊ฑฐ๋‚˜(Set) ๋Š๋Š”(Reset) ๊ฒƒ์ด๊ณ , ์ฝ๊ธฐ๋Š” ์ž‘์€ ์ „์••์œผ๋กœ ์ €ํ•ญ์„ ์ธก์ •ํ•˜๋Š” ๊ฒƒ์ž…๋‹ˆ๋‹ค. ์ œ์กฐ ์งํ›„์—๋Š” ํ•œ ๋ฒˆ์˜ Forming ๊ณผ์ •์œผ๋กœ ์ตœ์ดˆ ํ•„๋ผ๋ฉ˜ํŠธ ๊ฒฝ๋กœ๋ฅผ ๋งŒ๋“ค์–ด ์ค๋‹ˆ๋‹ค.

ReRAM Analysis

๊ทธ๋ฆผ 2. Forming/Set/Reset ๋™์ž‘๊ณผ I-V ์Šค์œ„์นญ ๊ณก์„ 

๋™์ž‘ ๋‹จ๊ณ„

Forming โ€” ์ œ์กฐ ํ›„ ์ตœ์ดˆ 1ํšŒ๋งŒ ์ˆ˜ํ–‰. ์ฒ˜๋…€ ์‚ฐํ™”๋ฌผ์— ๋†’์€ ์ „์••์„ ๊ฑธ์–ด ํ•„๋ผ๋ฉ˜ํŠธ๊ฐ€ ์ž๋ž„ ์ตœ์ดˆ ๊ฒฝ๋กœ๋ฅผ ๋šซ์Šต๋‹ˆ๋‹ค. ์ดํ›„ ์ผ๋ฐ˜ ๋™์ž‘์—์„œ๋Š” ๋ถˆํ•„์š”ํ•ฉ๋‹ˆ๋‹ค(์ตœ๊ทผ์—๋Š” forming-free ์†Œ์ž๋„ ์—ฐ๊ตฌ๋จ).

Set (์“ฐ๊ธฐ '1') โ€” ์ „์••์„ ๊ฑธ์–ด ํ•„๋ผ๋ฉ˜ํŠธ๋ฅผ ์—ฐ๊ฒฐ โ†’ HRS์—์„œ LRS๋กœ(์ €์ €ํ•ญํ™”). ์ „๋ฅ˜ ํญ์ฃผ๋กœ ์…€์ด ์˜๊ตฌ ์†์ƒ๋˜์ง€ ์•Š๋„๋ก compliance current(์ „๋ฅ˜ ์ œํ•œ)๋ฅผ ๋‘ก๋‹ˆ๋‹ค.

Reset (์“ฐ๊ธฐ '0') โ€” ๋ฐ˜๋Œ€ ๋™์ž‘์œผ๋กœ ํ•„๋ผ๋ฉ˜ํŠธ๋ฅผ ์ผ๋ถ€ ๋Š์–ด โ†’ LRS์—์„œ HRS๋กœ(๊ณ ์ €ํ•ญํ™”).

Read (์ฝ๊ธฐ) โ€” ์Šค์œ„์นญ๋ณด๋‹ค ํ›จ์”ฌ ์ž‘์€ ์ „์••์„ ๊ฑธ์–ด ํ๋ฅด๋Š” ์ „๋ฅ˜๋Ÿ‰(์ €ํ•ญ)์„ ์ธก์ •ํ•ฉ๋‹ˆ๋‹ค. ํฐ ์ „๋ฅ˜๋ฉด LRS('1'), ์ž‘์€ ์ „๋ฅ˜๋ฉด HRS('0'). ์ €์žฅ ์ƒํƒœ๋ฅผ ๋ฐ”๊พธ์ง€ ์•Š๋Š” ๋น„ํŒŒ๊ดด์  ์ฝ๊ธฐ์ž…๋‹ˆ๋‹ค.

๊ทน์„ฑ ๋ฐฉ์‹ โ€” Set๊ณผ Reset์— ๋ฐ˜๋Œ€ ๊ทน์„ฑ ์ „์••์„ ์“ฐ๋Š” bipolar ๋ฐฉ์‹๊ณผ, ๊ทน์„ฑ๊ณผ ๋ฌด๊ด€ํ•˜๊ฒŒ ์ „์•• ํฌ๊ธฐ๋กœ ๊ตฌ๋ถ„ํ•˜๋Š” unipolar ๋ฐฉ์‹์ด ์žˆ์œผ๋ฉฐ, ์†Œ์žฌ์™€ ๊ตฌ์กฐ์— ๋”ฐ๋ผ ๋‹ฌ๋ผ์ง‘๋‹ˆ๋‹ค.

์‹ค์ œ ํšŒ๋กœ์—์„œ๋Š” forming๊ณผ set์—์„œ compliance current๋ฅผ ์ •๋ฐ€ํ•˜๊ฒŒ ์ œ์–ดํ•ด ๊ณผ๋„ํ•œ ํ•„๋ผ๋ฉ˜ํŠธ ์„ฑ์žฅ์„ ๋ง‰์•„์•ผ ํ•ฉ๋‹ˆ๋‹ค. ํ•„๋ผ๋ฉ˜ํŠธ๊ฐ€ ๋„ˆ๋ฌด ๊ตต๊ฒŒ ํ˜•์„ฑ๋˜๋ฉด reset ์ „๋ฅ˜๊ฐ€ ์ปค์ง€๊ณ , ๋„ˆ๋ฌด ์–‡์œผ๋ฉด retention๊ณผ ์ฝ๊ธฐ margin์ด ๋ถˆ์•ˆ์ •ํ•ด์ง€๋ฏ€๋กœ write driver์™€ verify ์•Œ๊ณ ๋ฆฌ์ฆ˜์ด ์ค‘์š”ํ•ฉ๋‹ˆ๋‹ค.

4. ์–ด๋ ˆ์ด ๊ตฌ์กฐ โ€” Cross-point์™€ Sneak Path

ReRAM์˜ ๋‹จ์ˆœํ•œ 2๋‹จ์ž ๊ตฌ์กฐ๋Š” cross-point ์–ด๋ ˆ์ด์— ์ด์ƒ์ ์ž…๋‹ˆ๋‹ค. ์›Œ๋“œ๋ผ์ธ๊ณผ ๋น„ํŠธ๋ผ์ธ์ด ๊ต์ฐจํ•˜๋Š” ๋ชจ๋“  ์ ์— ์…€์„ ๋‘๋ฉด 4Fยฒ๊ธ‰(ํ˜น์€ 3D ์ ์ธต ์‹œ ๊ทธ ์ดํ•˜) ์ตœ๊ณ  ๋ฐ€๋„๋ฅผ ์–ป์Šต๋‹ˆ๋‹ค. ๋‹ค๋งŒ ์ด๋•Œ โ€˜sneak path(๋ˆ„์„ค ๊ฒฝ๋กœ)โ€™ ๋ฌธ์ œ๊ฐ€ ์ƒ๊ฒจ ์…€๋ ‰ํ„ฐ๊ฐ€ ํ•„์š”ํ•ฉ๋‹ˆ๋‹ค.

ReRAM Analysis

๊ทธ๋ฆผ 3. Cross-point ์–ด๋ ˆ์ด, sneak path ๋ฌธ์ œ, 1S1R/1T1R ์…€ ๊ตฌ์กฐ

Sneak Path์™€ ์…€๋ ‰ํ„ฐ

Sneak path โ€” cross-point์—์„œ ์„ ํƒํ•˜์ง€ ์•Š์€ ์…€๋“ค์„ ํ†ตํ•ด ์ „๋ฅ˜๊ฐ€ โ€˜๋ชฐ๋ž˜โ€™ ์šฐํšŒํ•ด ํ๋ฅด๋Š” ํ˜„์ƒ. ์ฝ๊ธฐ ์˜ค๋ฅ˜์™€ ์ „๋ ฅ ๋‚ญ๋น„๋ฅผ ์œ ๋ฐœํ•ฉ๋‹ˆ๋‹ค.

1S1R โ€” ๊ฐ ์…€์— ์…€๋ ‰ํ„ฐ(selector, ๋น„์„ ํ˜• ์†Œ์ž)๋ฅผ ์ง๋ ฌ๋กœ ๋ถ™์—ฌ sneak ์ „๋ฅ˜๋ฅผ ์–ต์ œํ•ฉ๋‹ˆ๋‹ค. cross-point์˜ ๊ณ ๋ฐ€๋„๋ฅผ ์œ ์ง€ํ•˜๋ฉด์„œ ๋ฌธ์ œ๋ฅผ ์™„ํ™”ํ•˜๋Š” ๋ฐฉ์‹์ž…๋‹ˆ๋‹ค.

1T1R โ€” ์…€๋งˆ๋‹ค ํŠธ๋žœ์ง€์Šคํ„ฐ๋ฅผ ๋‘์–ด ์›ํ•˜๋Š” ์…€๋งŒ ํ™•์‹คํžˆ ์ผœ๊ณ  ๋•๋‹ˆ๋‹ค. ์ œ์–ด๊ฐ€ ์•ˆ์ •์ ์ด๊ณ  sneak๋ฅผ ํ™•์‹คํžˆ ์ฐจ๋‹จํ•˜์ง€๋งŒ, ํŠธ๋žœ์ง€์Šคํ„ฐ ๋ฉด์  ๋•Œ๋ฌธ์— ๋ฐ€๋„๊ฐ€ ๋–จ์–ด์ง‘๋‹ˆ๋‹ค.

๊ฒฐ๊ตญ ๋ฐ€๋„(cross-pointยท1S1R)์™€ ์ œ์–ด ์•ˆ์ •์„ฑ(1T1R) ์‚ฌ์ด์˜ ํŠธ๋ ˆ์ด๋“œ์˜คํ”„์ด๋ฉฐ, ๊ณ ๋ฐ€๋„ ์Šคํ† ๋ฆฌ์ง€์—๋Š” 1S1R cross-point๊ฐ€, ์•ˆ์ •์„ฑ์ด ์ค‘์š”ํ•œ ์ž„๋ฒ ๋””๋“œ ์šฉ๋„์—๋Š” 1T1R์ด ์„ ํ˜ธ๋ฉ๋‹ˆ๋‹ค.

selector๋Š” ๋‹จ์ˆœํ•œ ๋ณด์กฐ ์†Œ์ž๊ฐ€ ์•„๋‹ˆ๋ผ ReRAM ์–ด๋ ˆ์ด์˜ usable density๋ฅผ ์ขŒ์šฐํ•˜๋Š” ํ•ต์‹ฌ ์š”์†Œ์ž…๋‹ˆ๋‹ค. selector์˜ off-state ๋ˆ„์„ค์ด ํฌ๋ฉด ๋น„์„ ํƒ ์…€ ๊ฒฝ๋กœ๊ฐ€ ๋งŽ์•„์งˆ์ˆ˜๋ก read disturb์™€ sensing margin ์ €ํ•˜๊ฐ€ ๋น ๋ฅด๊ฒŒ ์ปค์ง€๋ฏ€๋กœ, threshold switching ํŠน์„ฑ๊ณผ ์˜จ๋„ ์˜์กด์„ฑ๊นŒ์ง€ ํ•จ๊ป˜ ๊ฒ€ํ† ํ•ด์•ผ ํ•ฉ๋‹ˆ๋‹ค.

5. ๋‹ค๋ฅธ ๋ฉ”๋ชจ๋ฆฌ์™€์˜ ๋น„๊ต

ReRAM์€ ์ „ํ•˜๊ฐ€ ์•„๋‹ˆ๋ผ ์ €ํ•ญ์œผ๋กœ ์ €์žฅํ•œ๋‹ค๋Š” ์ ์—์„œ ๊ธฐ์กด ๋ฉ”๋ชจ๋ฆฌ์™€ ๊ทผ๋ณธ์ ์œผ๋กœ ๋‹ค๋ฆ…๋‹ˆ๋‹ค. ๋˜ํ•œ PCMยทMRAM๊ณผ ํ•จ๊ป˜ ์ฐจ์„ธ๋Œ€ ๋น„ํœ˜๋ฐœ์„ฑ ๋ฉ”๋ชจ๋ฆฌ(eNVM)๋กœ ๋ถ„๋ฅ˜๋˜๋ฉฐ, ๊ฐ๊ฐ ์žฅ๋‹จ์ ์ด ์žˆ์Šต๋‹ˆ๋‹ค.

์ €์žฅ ๋ฐฉ์‹ ๋น„๊ต

์ฐจ์„ธ๋Œ€ ๋น„ํœ˜๋ฐœ์„ฑ ๋ฉ”๋ชจ๋ฆฌ(eNVM) ๋น„๊ต

ReRAM์€ PCM(์ƒ๋ณ€ํ™”), MRAM(์ž๊ธฐ), FeRAM(๊ฐ•์œ ์ „์ฒด)๊ณผ ํ•จ๊ป˜ ์ฐจ์„ธ๋Œ€ ๋ฉ”๋ชจ๋ฆฌ ํ›„๋ณด๋กœ ๊ฒฝ์Ÿํ•ฉ๋‹ˆ๋‹ค. ๋Œ€ํ‘œ์  ํŠน์„ฑ์„ ๋น„๊ตํ•˜๋ฉด ๋‹ค์Œ๊ณผ ๊ฐ™์Šต๋‹ˆ๋‹ค(๋ฌธํ—Œ ๊ฐ’, ์†Œ์žฌยท๊ตฌ์กฐ์— ๋”ฐ๋ผ ํŽธ์ฐจ ์žˆ์Œ).

ReRAM์€ ์ž‘์€ ์…€ ๋ฉด์ , ๋‚ฎ์€ ์“ฐ๊ธฐ ์ „์••, ๋น ๋ฅธ ์ฝ๊ธฐ, ๋†’์€ ์ง‘์ ๋„๊ฐ€ ๊ฐ•์ ์ž…๋‹ˆ๋‹ค. ๋‹ค๋งŒ ์…€๋งˆ๋‹ค ํ•„๋ผ๋ฉ˜ํŠธ ํ˜•์„ฑ์ด ๋ฏธ์„ธํ•˜๊ฒŒ ๋‹ฌ๋ผ ์ƒ๊ธฐ๋Š” ์‚ฐํฌ(variability)์™€ ๋‚ด๊ตฌ์„ฑ ๊ด€๋ฆฌ๊ฐ€ ๊ณผ์ œ๋กœ ๊ผฝํž™๋‹ˆ๋‹ค.

์†Œ์žฌ์™€ ์Šค์œ„์นญ ๋ฉ”์ปค๋‹ˆ์ฆ˜ ๋น„๊ต

๊ตฌ๋ถ„ ๋Œ€ํ‘œ ๋ฉ”์ปค๋‹ˆ์ฆ˜ ๋Œ€ํ‘œ ์žฌ๋ฃŒ ์„ค๊ณ„ ๊ด€์ 
์‚ฐ์†Œ ๊ณต๊ณตํ˜• OxRAM ์‚ฐ์†Œ ๋นˆ ์ž๋ฆฌ ์ด๋™์œผ๋กœ ์‚ฐํ™”๋ฌผ ๋‚ด ์ „๋„ ๊ฒฝ๋กœ ํ˜•์„ฑ HfO2, TaOx, TiOx CMOS/BEOL ํ˜ธํ™˜์„ฑ๊ณผ ์ €์ „์•• ๊ตฌํ˜„์ด ๊ฐ•์ ์ž…๋‹ˆ๋‹ค
๊ธˆ์† ํ•„๋ผ๋ฉ˜ํŠธํ˜• CBRAM Ag, Cu ์ด์˜จ์ด ์ด๋™ํ•ด ๊ธˆ์† ๋ธŒ๋ฆฌ์ง€ ํ˜•์„ฑ Ag/GeS, Cu/SiO2 ๊ณ„์—ด ๋‚ฎ์€ ์ „๋ฅ˜๋กœ ๋™์ž‘ํ•˜์ง€๋งŒ ๊ธˆ์† ํ™•์‚ฐ ์ œ์–ด๊ฐ€ ์ค‘์š”ํ•ฉ๋‹ˆ๋‹ค
Bipolar switching Set/Reset์— ๋ฐ˜๋Œ€ ๊ทน์„ฑ ์‚ฌ์šฉ ์‚ฐํ™”๋ฌผ ReRAM ๋‹ค์ˆ˜ selector์™€ write driver ๊ทน์„ฑ ์„ค๊ณ„๊ฐ€ ๋‹จ์ˆœํ•ด์ง‘๋‹ˆ๋‹ค
Unipolar switching ๊ฐ™์€ ๊ทน์„ฑ์—์„œ ์ „์••/์ „๋ฅ˜ ํฌ๊ธฐ๋กœ ์ƒํƒœ ์ „ํ™˜ ์ผ๋ถ€ ์‚ฐํ™”๋ฌผ/์—ด ๊ธฐ๋ฐ˜ ๊ตฌ์กฐ Joule heating๊ณผ reset ์ „๋ฅ˜ ๊ด€๋ฆฌ๊ฐ€ ๋” ์ค‘์š”ํ•ฉ๋‹ˆ๋‹ค

6. ํ™œ์šฉ๊ณผ ์ „๋ง

ReRAM์€ ๋‹จ์ˆœํ•œ ์ €์žฅ์žฅ์น˜๋ฅผ ๋„˜์–ด, ๋ฉ”๋ชจ๋ฆฌ์—์„œ ์ง์ ‘ ์—ฐ์‚ฐํ•˜๋Š” ์ƒˆ๋กœ์šด ์ปดํ“จํŒ… ํŒจ๋Ÿฌ๋‹ค์ž„์˜ ํ•ต์‹ฌ ์†Œ์ž๋กœ ์ฃผ๋ชฉ๋ฐ›์Šต๋‹ˆ๋‹ค.

์ž„๋ฒ ๋””๋“œ NVM โ€” CMOS ๊ณต์ •๊ณผ ํ˜ธํ™˜๋˜๊ณ  BEOL ์ ์ธต์ด ๊ฐ€๋Šฅํ•ด, MCUยทIoTยท์ž๋™์ฐจ์šฉ ์ž„๋ฒ ๋””๋“œ ๋น„ํœ˜๋ฐœ์„ฑ ๋ฉ”๋ชจ๋ฆฌ๋กœ ์ƒ์šฉํ™”๊ฐ€ ์ง„ํ–‰ ์ค‘์ž…๋‹ˆ๋‹ค.

In-Memory Computing โ€” cross-point ์–ด๋ ˆ์ด์—์„œ ์˜ด์˜ ๋ฒ•์น™ยทํ‚ค๋ฅดํžˆํ˜ธํ”„ ๋ฒ•์น™์œผ๋กœ ๊ณฑ-๋ˆ„์ (MAC) ์—ฐ์‚ฐ์„ ๋ฉ”๋ชจ๋ฆฌ ๋‚ด๋ถ€์—์„œ ์ˆ˜ํ–‰ โ†’ ๋ฐ์ดํ„ฐ ์ด๋™์„ ์ค„์—ฌ ์ „๋ ฅยท์ง€์—ฐ์„ ํฌ๊ฒŒ ๋‚ฎ์ถฅ๋‹ˆ๋‹ค.

๋‰ด๋กœ๋ชจํ”ฝ ์ปดํ“จํŒ… โ€” ์…€์˜ ์ €ํ•ญ(์ปจ๋•ํ„ด์Šค)์„ ์‹œ๋ƒ…์Šค ๊ฐ€์ค‘์น˜๋กœ ์‚ฌ์šฉํ•ด ์‹ ๊ฒฝ๋ง์„ ๋ฌผ๋ฆฌ์ ์œผ๋กœ ๊ตฌํ˜„ํ•ฉ๋‹ˆ๋‹ค. ReRAM์˜ ์•„๋‚ ๋กœ๊ทธ ๋‹ค์ค€์œ„(multi-level) ํŠน์„ฑ์ด ์‹œ๋ƒ…์Šค ๋ชจ๋ฐฉ์— ์ ํ•ฉํ•ฉ๋‹ˆ๋‹ค.

์ตœ๊ทผ ๋™ํ–ฅ โ€” 2025๋…„ ๊ธฐ์ค€ Weebit Nano, Panasonic, GlobalFoundries ๋“ฑ์ด ์ž„๋ฒ ๋””๋“œ ReRAM๊ณผ AIยท์—ฃ์ง€์šฉ ์นฉ์„ ๋ฐœํ‘œํ•˜๋ฉฐ ์ƒ์šฉํ™”์™€ AI ๊ฐ€์† ์‘์šฉ์ด ํ™•๋Œ€๋˜๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.

์‹ ๋ขฐ์„ฑ ๊ด€์ ์—์„œ ๋ณด๋Š” ๊ณผ์ œ

ReRAM์˜ ํ•ต์‹ฌ ๋‚œ์ ์€ ๋‹จ์ˆœํžˆ ์Šค์œ„์นญ์ด ๋˜๋А๋ƒ๊ฐ€ ์•„๋‹ˆ๋ผ, ๊ฐ™์€ ์…€์ด ์ˆ˜๋งŽ์€ ์‚ฌ์ดํด ํ›„์—๋„ ์ถฉ๋ถ„ํ•œ on/off window๋ฅผ ์œ ์ง€ํ•˜๋А๋ƒ์ž…๋‹ˆ๋‹ค. ํ•„๋ผ๋ฉ˜ํŠธ ๊ธฐ๋ฐ˜ ์†Œ์ž๋Š” ์›์ž ๋‹จ์œ„ ์ด๋™์— ๋ฏผ๊ฐํ•˜๋ฏ€๋กœ cycle-to-cycle variation, cell-to-cell variation, read disturb, retention drift๊ฐ€ ํ•จ๊ป˜ ๋‚˜ํƒ€๋‚  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

ํŠนํžˆ ์ž„๋ฒ ๋””๋“œ NVM์—์„œ๋Š” ์ž๋™์ฐจ ์˜จ๋„ ๋ฒ”์œ„์™€ ์žฅ๊ธฐ retention ์กฐ๊ฑด์„ ๋™์‹œ์— ๋งŒ์กฑํ•ด์•ผ ํ•˜๊ณ , AI์šฉ ์•„๋‚ ๋กœ๊ทธ/๋‹ค์ค€์œ„ ์‘์šฉ์—์„œ๋Š” ํ•œ ๋ฒˆ์˜ LRS/HRS ์ „ํ™˜๋ณด๋‹ค intermediate conductance๋ฅผ ์–ผ๋งˆ๋‚˜ ๋ฐ˜๋ณต ๊ฐ€๋Šฅํ•˜๊ฒŒ ์ œ์–ดํ•˜๋Š”์ง€๊ฐ€ ๋” ์ค‘์š”ํ•ฉ๋‹ˆ๋‹ค. ๊ทธ๋ž˜์„œ ์ œํ’ˆ ์ˆ˜์ค€์˜ ReRAM์€ ์žฌ๋ฃŒ ์ž์ฒด๋ณด๋‹ค๋„ verify-write, error ๊ด€๋ฆฌ, selector ํ†ตํ•ฉ, ๊ณต์ • ๊ท ์ผ๋„ ๊ฐœ์„ ์ด ๊ฒฝ์Ÿ๋ ฅ์˜ ํฐ ๋น„์ค‘์„ ์ฐจ์ง€ํ•ฉ๋‹ˆ๋‹ค.

ํ•ต์‹ฌ ์ •๋ฆฌ โ€” ReRAM์€ โ€˜์ „ํ•˜โ€™๊ฐ€ ์•„๋‹ˆ๋ผ โ€˜์ €ํ•ญโ€™์œผ๋กœ ์ •๋ณด๋ฅผ ์ €์žฅํ•˜๋Š” ๋น„ํœ˜๋ฐœ์„ฑ ๋ฉ”๋ชจ๋ฆฌ๋กœ, ๋‹จ์ˆœํ•œ MIM ๊ตฌ์กฐ์—์„œ ํ•„๋ผ๋ฉ˜ํŠธ๋ฅผ ์—ฐ๊ฒฐ(Set)ํ•˜๊ฑฐ๋‚˜ ๋Š์–ด(Reset) ์ €์ €ํ•ญ/๊ณ ์ €ํ•ญ ์ƒํƒœ๋กœ 0/1์„ ๊ธฐ๋กํ•ฉ๋‹ˆ๋‹ค. 2๋‹จ์ž ๊ตฌ์กฐ ๋•์— cross-point ๊ณ ๋ฐ€๋„ยท3D ์ ์ธต์— ์œ ๋ฆฌํ•˜์ง€๋งŒ sneak path ๋•Œ๋ฌธ์— ์…€๋ ‰ํ„ฐ(1S1R/1T1R)๊ฐ€ ํ•„์š”ํ•ฉ๋‹ˆ๋‹ค. ๋น ๋ฅธ ์†๋„ยท์ €์ „์••ยท๊ณ ์ง‘์ ยทCMOS ํ˜ธํ™˜์„ฑ์œผ๋กœ ์ฐจ์„ธ๋Œ€ ์ž„๋ฒ ๋””๋“œ NVM์ด์ž, in-memoryยท๋‰ด๋กœ๋ชจํ”ฝ ์ปดํ“จํŒ…์˜ ์œ ๋ ฅํ•œ ์†Œ์ž๋กœ ์ฃผ๋ชฉ๋ฐ›๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.

์ƒํƒœ ํ•„๋ผ๋ฉ˜ํŠธ ์ €ํ•ญ ์ „๋ฅ˜ ๋…ผ๋ฆฌ๊ฐ’
LRS (Low Resistance State) ์—ฐ๊ฒฐ๋จ ๋‚ฎ์Œ ์ž˜ ํ๋ฆ„ ๋ณดํ†ต '1'
HRS (High Resistance State) ๋‹จ์ ˆ๋จ ๋†’์Œ ๋ง‰ํž˜ ๋ณดํ†ต '0'
๋ฉ”๋ชจ๋ฆฌ ์ €์žฅ ์›๋ฆฌ ํœ˜๋ฐœ์„ฑ ์…€ ๊ตฌ์กฐ
SRAM ๊ต์ฐจ๊ฒฐํ•ฉ ์ธ๋ฒ„ํ„ฐ ๋ž˜์น˜ (์ „ํ•˜) ํœ˜๋ฐœ์„ฑ 6T
DRAM ์ปคํŒจ์‹œํ„ฐ ์ „ํ•˜ ํœ˜๋ฐœ์„ฑ (Refresh) 1T1C
NAND ๊ฒŒ์ดํŠธ ์ ˆ์—ฐ๋ง‰์˜ ๊ฐ‡ํžŒ ์ „ํ•˜ ๋น„ํœ˜๋ฐœ์„ฑ ์ „ํ•˜ ์ €์žฅ ํŠธ๋žœ์ง€์Šคํ„ฐ
ReRAM ์ €ํ•ญ ์ƒํƒœ (ํ•„๋ผ๋ฉ˜ํŠธ) ๋น„ํœ˜๋ฐœ์„ฑ 2๋‹จ์ž MIM (+์…€๋ ‰ํ„ฐ)
ํŠน์„ฑ ReRAM MRAM PCM FeRAM
์…€ ๋ฉด์  ์•ฝ 4 Fยฒ 6~50 Fยฒ 4~20 Fยฒ ์•ฝ 22 Fยฒ
์“ฐ๊ธฐ ์ „์•• < 2 V < 2 V < 3 V < 3 V
์ฝ๊ธฐ ์‹œ๊ฐ„ ~1 ns ~20 ns < 10 ns < 5 ns
๋‚ด๊ตฌ์„ฑ(cycles) ~10ยนยฒ > 10ยนโต 10โถ~10โน > 10ยนโด

7. ์žฅ๋‹จ์ 

๊ตฌ๋ถ„ ๋‚ด์šฉ
์žฅ์  2๋‹จ์ž MIM ๊ตฌ์กฐ๊ฐ€ ๋‹จ์ˆœํ•˜๊ณ , 4Fยฒ๊ธ‰ ๊ณ ๋ฐ€๋„์™€ 3D ์ ์ธต์— ์œ ๋ฆฌํ•ฉ๋‹ˆ๋‹ค. ์ €์ „์•• ์Šค์œ„์นญ๊ณผ CMOS/BEOL ํ˜ธํ™˜์„ฑ๋„ ๊ฐ•์ ์ž…๋‹ˆ๋‹ค.
ํ•œ๊ณ„ forming ํŽธ์ฐจ, ์†Œ์ž ๊ฐ„ ์‚ฐํฌ, endurance/retention trade-off, sneak path ์ œ์–ด๊ฐ€ ๊ณผ์ œ์ž…๋‹ˆ๋‹ค.

8. ๊ด€๋ จ ๊ธฐ์ˆ ๊ณผ ์ฐธ๊ณ  ๋ฌธํ—Œ

ReRAM์€ MRAM Analysis, PCM Analysis, FeRAM Analysis๊ณผ ํ•จ๊ป˜ ์ฐจ์„ธ๋Œ€ eNVM ๋น„๊ต์˜ ๊ธฐ์ค€์ ์ด ๋ฉ๋‹ˆ๋‹ค. ํŠนํžˆ MRAM์€ ์žํ™” ๋ฐฉํ–ฅ, PCM์€ ์ƒ ๋ณ€ํ™”, FeRAM์€ ๋ถ„๊ทน์œผ๋กœ ์ €์žฅํ•˜๋ฏ€๋กœ ReRAM์˜ ํ•„๋ผ๋ฉ˜ํŠธ ๊ธฐ๋ฐ˜ ์ €ํ•ญ ์Šค์œ„์นญ๊ณผ ๋Œ€๋น„๊ฐ€ ๋ถ„๋ช…ํ•ฉ๋‹ˆ๋‹ค.

  • Rainer Waser, Masakazu Aono, "Nanoionics-based resistive switching memories", Nature Materials 6(11), 833-840 (2007). DOI: https://doi.org/10.1038/nmat2023
  • Resistive random-access memory - overview, forming, operation styles, material systems
  • H.-S. Philip Wong et al., "Metal-Oxide RRAM", Proceedings of the IEEE 100(6), 1951-1970 (2012). DOI: https://doi.org/10.1109/JPROC.2012.2190369
  • 3D XPoint - cross-point ๊ธฐ๋ฐ˜ storage-class memory ์‚ฌ๋ก€
  • Memristor - ReRAM๊ณผ ์—ฐ๊ฒฐ๋˜๋Š” memristive system ๊ฐœ๋… ๋ฐ ๋ชจ๋ธ๋ง ๋…ผ์˜

9. ํ•ต์‹ฌ ์ •๋ฆฌ

ReRAM์€ ์‚ฐํ™”๋ฌผ MIM ๊ตฌ์กฐ์—์„œ ์‚ฐ์†Œ ๊ณต๊ณต์ด๋‚˜ ๊ธˆ์† ์ด์˜จ์ด ๋งŒ๋“œ๋Š” ํ•„๋ผ๋ฉ˜ํŠธ๋กœ ์ €ํ•ญ์„ ๋ฐ”๊พธ๋Š” ๋น„ํœ˜๋ฐœ์„ฑ ๋ฉ”๋ชจ๋ฆฌ์ž…๋‹ˆ๋‹ค. Set/Reset์œผ๋กœ LRS/HRS๋ฅผ ์˜ค๊ฐ€๋ฉฐ, ์ฝ๊ธฐ๋Š” ์ž‘์€ ์ „์••์œผ๋กœ ์ €ํ•ญ๋งŒ ์ธก์ •ํ•ฉ๋‹ˆ๋‹ค. 2๋‹จ์ž ๊ตฌ์กฐ ๋•๋ถ„์— ๊ณ ๋ฐ€๋„ cross-point์™€ 3D ์ ์ธต์— ์œ ๋ฆฌํ•˜์ง€๋งŒ, sneak path์™€ ์†Œ์ž ์‚ฐํฌ๋ฅผ ๋ง‰๊ธฐ ์œ„ํ•œ selector ์„ค๊ณ„๊ฐ€ ์ค‘์š”ํ•ฉ๋‹ˆ๋‹ค. ์ €์ „์••ยท๊ณ ์ง‘์ ยทCMOS ํ˜ธํ™˜์„ฑ ๋•Œ๋ฌธ์— ์ž„๋ฒ ๋””๋“œ NVM, ์ธ๋ฉ”๋ชจ๋ฆฌ ์ปดํ“จํŒ…, ๋‰ด๋กœ๋ชจํ”ฝ ์†Œ์ž์˜ ํ•ต์‹ฌ ํ›„๋ณด๋กœ ๊ณ„์† ์—ฐ๊ตฌ๋˜๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.